Over 35 years of hands-on experience in radio frequency engineering.Expertise in: High power amplifiers, transceiver and antenna design, communication and radar subsystem design.
• 6 Publications
Nearly 20 years of experience in the wireless communication systems field in both start-up and large companies in research and development.
• 20 technical papers and publications
• 2 books published
• Adjunct Professor and Lecturer of courses in 2G, 3G, and 4G Telecommunication Systems (LTE)
• Review Panel Member for the National Science Foundation (NSF)
• Telecommunications & DSP SoC architect, ASIC designer, & embedded software designer
• 20+ years of technology experience
• 15+ years of industry experience designing & managing telecommunications, electronic design automation & image processing products & projects
• 30+ mixed signal chips designed/fabricated
• 70 technical publications
• Professional Engineer (PE)
• Senior member of IEEE, ARRL, NSPE, AAAS, SPIE, MRS, Naval Institute
Over 20 years of experience in the semiconductor manufacturing industry.
PhD in EE, minor in Aeronautical Engineering, Space-based Communications
Over a decade of experience at Intel
• EE Times ACE Awards
• Member of IEEE Solid State Circuits
Passionate senior communication systems semiconductor business leader with extensive expertise. Specializes in business center management, RF systems, RFIC, mixed signal and DSP R&D management.
• IEEE 802 LAN/MAN Standards Committee
• Voting member, 1993-2002; Editor, State Machines, 1996-1999; Editor, Task Group E, 2000-2002
• JEDEC JC-61 Standards Committee, Member
• Designed 24 processors in technologies ranging from TTL MSI to 45nm CMOS.
Over 30 years of experience in computer and system architecture, R&D, wired and wireless data networks, LTE, Wi-Fi protocols and IEEE 802.11 standards.
More than 25 patent litigation cases. Gave depositions and testified in court both in the U.S. and in Europe. Did numerous portfolio evaluations, claim analyses and prior art searches.
12 years developing raster graphics and image processing systems, I/O controllers and multiprocessor workstations. Invented and led development of the world’s first RAM-based color raster graphics system.
10 years applied symmetric multiprocessing to LAN servers and pioneered the use of a LAN as a virtual I/O channel. Invented and led development of the world’s first LAN with dynamically variable data rates.
15 years wireless data networks.
3 years writing operating systems and compilers
• 8 Publications
Over 25 years of experience in the semiconductor industry as an Individual Technical Contributor, Senior Technologist, Senior Technical Manager and Technical Fellow.
18+ Yrs of experience,
Specialized in touch screen, mobile touch business, smart display
Technical expert in diverse products including wireless/mobile, communications, industrial and automotive solutions.
Major design wins and partnerships including Apple, Samsung, Qualcomm, Huawei, and Xiaomi.
• Senior Member of IEEE
Specialized in optical networks and components
Developed system models and hardware
R&D in fiber optics and photonics.
Expert witness experience
Performance analysis of satellite cross-link.
Optical distribution of microwave signals in satellites.
• Over 18 years of experience in leading edge technology in various engineering disciplines including
design/verification, production and manufacturing, research & development of high speed networking and
communication, quality assurance, integration and segmentation at top global leading semiconductor
companies in Silicon Valley.
• Extensive experience in preparing, and teaching general and highly customized technical courses for new
hired engineers and training overseas engineering staff.
• 35 years of engineering experience in semiconductor design, analysis, measurement, debug, failure analysis and patent infringement analysis. • Prior to freelancing, worked at the memory design firm Mosaid from 1980 to 1994 (64K to 16M DRAM generations) in various roles including designer, design manager, and engineering sales. David now reverseengineers RAM circuits for IP clients, his most recent analysis being a 90 nm embedded DRAM in a leading cellphone device.
• 12+ yrs. diverse experience in advanced IC packaging development, process integration, materials characterization and program management • Authored 32 (issued/pending) patents and 16 technical publications • Certified Electroplater Finisher (CEF) by American Electroplaters and Surface Finishers Society • Knowledge of various characterization/FA techniques & problem solving methodologies 8D, DOE, SPC, FMEA, KT • Well versed in computer applications, highly motivated team leader with strong presentation and interpersonal skills
• Life Senior Member of the IEEE.
• 10 issued/9 pending US patent applications & 6 Publications
• 2015 IEEE Region 6 Central Area Outstanding Engineer Award
• Member of the Executive Steering Committee of the San Francisco Bay Area Nanotechnology Council Chapter, 2005 to present. 2009 & 2014 Chair.
• IEEE SFBA Nanotechnology Council Chapter wins 2014 IEEE NTC Chapter Award.
• Editorial Board Member – International Journal of Humanitarian Technology
• IEEE Global Humanitarian Technology Conference – 2014 Health Track Program Co-Chair
• Listed as a Grant Reviewer for the NSF
Expert in Image Sensor fabrication, operation, devices, packaging
Extensive industry experience spanning multiple applications of Integrated Circuit Technology with an emphasis in fabrication technology
Has contributed in Defense and Aerospace, Semiconductor Device and Manufacturing process development, 3G mobile technology, and Disk Drive Technology
• 22 Patents
• Harvard University: Associate Research Scientist
• University of Pennsylvania: Professor in Material Science and Engineering
• Technical Reviewer: Thin Solid Films and other journals
• Invited Lecturer:
Technology Workshops and Presentations at: Cisco, Celestica, Flextronics, Solectron,Jabil, Northrop Grummund, Motorola, Nokia, Raytheon, Boeing; and many other companies.
Experienced in electronic materials, micro-devices, system design, failure analysis, surface science, thin films for both optical and electronic applications for LED device design, light fixture design and optimization, PCB, advanced electronics for LED power supply drivers and controllers, semiconductor devices, Li-Ion battery development for space satellites.
Experienced in depositions, expert declarations.
• 31 US Issued Patents; 1 pending
• Languages: English and French
• PhD, 35+ years combined experience in High Technology; Manufacturing, Development, Research and Start Up Companies
• Manufacturing, Outsourcing, Product Qualification, Reliability and Equipment Design of High-Tech Electronics
• Specialized Technical Skills: LCD, OLED, Electronic Packaging of Displays and Components, Touchscreens, Smartphone Teardown and Analysis
• Lecturer in Electronic Displays and Inter-Disciplinary Work in Biophysics Technologies
• Liquid Crystal Displays and Flat Panel Display Design/Packaging/Manufacturing
19+ years of experience at IBM
Worldwide recognized expert in semiconductor technology
Proven track record of developing and transferring multiple generations of semiconductor
technologies from early pathfinding research to volume production
Member of IBM Academy of Technology (AoT)
Master Inventor at IBM
Inventor on thousands of granted patents
100+ peer-reviewed publications