Core Expertise:
Lead and developed several memory packaging technologies in TSV/3DI, WLP, flip chip, CPB, RDL, BOC, COB, F2F, imagers and LEDs from conception to qualification & HVM • Strong materials background with keen interest in corrosion, organic-inorganic hybrid coatings, adhesion, solder metallurgy, electroplating, chip package interaction and semiconductor processing
Previous Companies:
Micron • Moen • Xilinx

• 12+ yrs. diverse experience in advanced IC packaging development, process integration, materials characterization and program management • Authored 32 (issued/pending) patents and 16 technical publications • Certified Electroplater Finisher (CEF) by American Electroplaters and Surface Finishers Society • Knowledge of various characterization/FA techniques & problem solving methodologies 8D, DOE, SPC, FMEA, KT • Well versed in computer applications, highly motivated team leader with strong presentation and interpersonal skills